1. Field of the Invention
This invention relates to a pressure-contact semiconductor in which insulated-gate semiconductor elements, such as IGBTs, are provided in a single package, and more particularly to a pressure-contact semiconductor device capable of improving the stability of switching operation.
2. Discussion of the Background
Pressure-contact semiconductor devices have been widely used for packages of semiconductor chips including insulated-gate elements. A pressure-contact semiconductor device has a gate terminal that penetrates the enclosure of the package and is electrically connected to the gate pad of each semiconductor chip.
In the pressure-contact semiconductor device, a plurality of semiconductor chips arranged in a plane are sandwiched and press-packed between a flat-plate emitter electrode around which an insulating enclosure is provided and a flat-plate corrector electrode, whereby the emitter electrode is made in pressure-contact with the semiconductor chips. A gate terminal is provided in such a manner that it penetrates the insulating enclosure. Inside the package (on the emitter electrode side), there are provided spring pins arranged in such a manner that each of the pins come into pressure-contact with the gate pad of each of the semiconductor chips. Leads including gate resistors connect the spring pins to the gate terminal in parallel.
In another known pressure-contact semiconductor device, semiconductor chips are arranged on a collector electrode plate, an annular insulating plate made of resin or ceramic is provided on the periphery of the collector electrode plate in such a manner that the insulating plate surrounds the semiconductor chips, and a thin layer of a gate wiring network evaporated over the insulating substrate is wire-bonded to the gate pad of each semiconductor chip. In this case, the semiconductor chips are sandwiched and press-packed between an emitter plate having protruded emitter electrode and the collector electrode plate.
The above-described pressure-contact semiconductor devices have the following problems. The problem which the configuration where the individual leads are connected to the gate terminal in parallel encounters is that the inductance components of the leads corrupt the current waveform of each chip as shown in FIG. 1, which makes the switching operation unstable.
Furthermore, the problem which the configuration where the gate wiring network is bonded to each semiconductor chip encounters is that the inductance components of the gate wiring network and bonding wires cannot be ignored and therefore the current oscillates, which makes the switching operation unstable. The instability becomes more significant as the number of chips increases. The bonding connection has a long-term reliability problem stemming from vibration resistance or aging. In addition, the configuration requires insulation for high voltages between the gate wiring network and the collector electrode plate to which high voltages are applied, which leads to an insulation problem.